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GB/T 41325-2022 English PDF

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GB/T 41325-2022: Low density crystal originated pit polished monocrystalline silicon wafers for integrated circuit
Status: Valid
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GB/T 41325-2022English179 Add to Cart 3 days [Need to translate] Low density crystal originated pit polished monocrystalline silicon wafers for integrated circuit Valid GB/T 41325-2022

PDF similar to GB/T 41325-2022


Standard similar to GB/T 41325-2022

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Basic data

Standard ID GB/T 41325-2022 (GB/T41325-2022)
Description (Translated English) Low density crystal originated pit polished monocrystalline silicon wafers for integrated circuit
Sector / Industry National Standard (Recommended)
Classification of Chinese Standard H82
Word Count Estimation 9,948
Issuing agency(ies) State Administration for Market Regulation, China National Standardization Administration

GB/T 41325-2022: Low density crystal originated pit polished monocrystalline silicon wafers for integrated circuit


---This is a DRAFT version for illustration, not a final translation. Full copy of true-PDF in English version (including equations, symbols, images, flow-chart, tables, and figures etc.) will be manually/carefully translated upon your order.
Low density crystal originated pit polished monocrystalline silicon wafers for integrated circuit ICS 29.045 CCSH82 National Standards of People's Republic of China Low-density crystal native pits for integrated circuits Silicon Single Crystal Polished Wafers 2022-10-01 Implementation State Administration for Market Regulation Released by the National Standardization Administration

foreword

This document is in accordance with the provisions of GB/T 1.1-2020 "Guidelines for Standardization Work Part 1.Structure and Drafting Rules of Standardization Documents" drafted. Please note that some content of this document may be patented. The issuing agency of this document assumes no responsibility for identifying patents. This document is jointly developed by the National Standardization Technical Committee for Semiconductor Equipment and Materials (SAC/TC203) and the National Standard for Semiconductor Equipment and Materials The material sub-technical committee (SAC/TC203/SC2) of the Chemical Technology Committee jointly proposed and managed it. This document is drafted by. Youyan Semiconductor Silicon Materials Co., Ltd., Shandong Youyan Semiconductor Materials Co., Ltd., Hangzhou Zhongxin Wafer Semiconductor Co., Ltd., Nanjing Guosheng Electronics Co., Ltd., Nonferrous Metals Technology and Economic Research Institute Co., Ltd., Zhejiang Jinruihong Technology Co., Ltd. Co., Ltd., Zhonghuan Leading Semiconductor Materials Co., Ltd., Zhejiang Haina Semiconductor Co., Ltd. The main drafters of this document. Sun Yan, Ning Yongduo, Zhong Genghang, Li Yang, Xu Xinhua, Luo Hong, Yang Suxin, Li Suqing, Zhang Haiying, You Bailing, Pan Jinping. Low-density crystal native pits for integrated circuits Silicon Single Crystal Polished Wafers

1 Scope

This document specifies the technical requirements and tests for low-density crystal primary pit silicon single crystal polished wafers (hereinafter referred to as Low-COP polished wafers). Methods, inspection rules, packaging, marking, transportation, storage, accompanying documents and the contents of the order form. This document applies to.200mm and 300mm diameter, crystal orientation < 100 >, resistors for integrated circuits sensitive to crystal native pits Low-COP polished sheets with a rate of 0.1Ω·cm~100Ω·cm.

2 Normative references

The contents of the following documents constitute essential provisions of this document through normative references in the text. Among them, dated citations documents, only the version corresponding to that date applies to this document; for undated references, the latest edition (including all amendments) applies to this document. GB/T 1550 Test method for conductivity type of extrinsic semiconductor materials GB/T 2828.1 Counting Sampling Inspection Procedure Part 1.Lot-by-Lot Inspection Sampling Plan Retrieved by Acceptance Quality Limit (AQL) GB/T 4058 Test method for oxidation-induced defects of silicon polished wafers GB/T 6616 Semiconductor silicon wafer resistivity and silicon thin film sheet resistance test method non-contact eddy current method GB/T 6624 Visual inspection method for the surface quality of silicon polished wafers GB/T 12962 Silicon single crystal GB/T 12965 Silicon single crystal cutting and grinding wafers GB/T 14264 Terms of Semiconductor Materials GB/T 19921 Test method for surface particles of silicon polished wafers GB/T 29504 300mm silicon single crystal GB/T 29505 Surface roughness measurement method of flat surface of silicon wafer GB/T 29507 Silicon wafer flatness, thickness and total thickness variation test automatic non-contact scanning method GB/T 29508 300mm silicon single crystal cutting wafer and grinding wafer GB/T 32280 Automatic non-contact scanning method for testing the warpage and curvature of silicon wafers GB/T 39145 Determination of Metal Element Content on the Surface of Silicon Wafer Inductively Coupled Plasma Mass Spectrometry YS/T 28 wafer packaging YS/T 679 Surface Photovoltaic Method for Measuring Minority Carrier Diffusion Length in Extrinsic Semiconductors Evaluation of SEMIM67 wafer near-edge geometry ESFQR, ESFQD, ESBIR methods (Test method for FQD, and ESBIRmetrics)

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