GB/T 16595-2019 PDF English
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| Standard ID | Contents [version] | USD | STEP2 | [PDF] delivery | Name of Chinese Standard | Status |
| GB/T 16595-2019 | English | 140 |
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Specification for a Universal Wafer Grid
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| GB/T 16595-1996 | English | 279 |
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Specification for a universal wafer grid
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GB/T 16595-2019: Specification for a Universal Wafer Grid---This is an excerpt. Full copy of true-PDF in English version (including equations, symbols, images, flow-chart, tables, and figures etc.), auto-downloaded/delivered in 9 seconds, can be purchased online: https://www.ChineseStandard.net/PDF.aspx/GBT16595-2019
NATIONAL STANDARD OF THE
PEOPLE’S REPUBLIC OF CHINA
ICS 29.045
H 80
Replacing GB/T 16595-1996
Specification for a Universal Wafer Grid
ISSUED ON: MARCH 25, 2019
IMPLEMENTED ON: FEBRUARY 01, 2020
Issued by: State Administration for Market Regulation;
Standardization Administration of the People’s Republic of
China.
Table of Contents
Foreword ... 3
1 Scope ... 5
2 Normative references ... 5
3 Terms and definitions ... 5
4 Grid cell layout ... 5
5 Application of grids ... 10
Foreword
This Standard was drafted in accordance with the rules given in GB/T 1.1-2009.
This Standard replaces GB/T 16595-1996, "Specification for a universal wafer
grid". Compared with GB/T 16596-1996, the main technical changes, except
editorial changes, are as follows:
-- Add the scope of application "This Standard applies to silicon wafers of
which the nominal diameter is 100 mm ~ 200 mm; it also applies to other
semiconductor material wafers" (see Chapter 1);
-- Include part of the contents of “Chapter 1, Scope”, in “5 Application of grids”
(see Chapter 5, Chapter 1 of version 1996);
-- Delete GB/T 1554, YS/T 209, SEMI M1, SEMI M2 and SEMI M11 in
“Normative references”; add GB/T 30453 (see Chapter 2, Chapter 2 of
version 1996);
-- Modify the contents of 4.1.2 of “4.1, Grid cell plan”, into "the selection of
the grid outer diameter shall take into account the edge removal, diameter
allowable deviation and chamfer of the wafer. Generally, the grid outer
diameter is selected as the diameter of the qualified mass zone, wherein
the radius of the qualified mass zone is 3 mm or 4 mm smaller than the
nominal radius of the wafer; the corresponding grid circle diameter is
shown in Table 2" (see 4.1.2, 4.1.2 of version 1996);
-- Add grid circle diameters for wafers whose diameters are 150 mm and 200
mm, of which the qualified mass radius is 4 mm smaller than the nominal
radius of the wafer (see Table 2);
-- Modify the contents of the “4.4, Wafer with sub-reference plane” into "when
a qualified mass area whose radius is 3 mm smaller than the wafer
nominal radius is used, the grids will not exceed the edge of the wafer
sub-reference plane area; therefore, the grid ignores the sub-reference
plane" (see 4.4, 4.4 of version 1996);
-- Add "5 Application of grids" (see Chapter 5).
This Standard is jointly proposed and managed by the National Semiconductor
Equipment and Materials Standardization Technical Committee (SAC/TC 203)
and the National Semiconductor Equipment and Materials Standardization
Technical Committee Material Subcommittee (SAC/TC 203 / SC 2).
The drafting organizations of this Standard: Zhejiang Haina Semiconductor Co.,
Ltd., China Nonferrous Metals Techno-Economic Research Institute, GRINM
Specification for a Universal Wafer Grid
1 Scope
This Standard specifies grid patterns that can be used to quantitatively describe
surface defects on a circular semiconductor wafer.
This Standard applies to silicon wafers of which the nominal diameter is 100
mm ~ 200 mm; it also applies to other semiconductor material wafers
2 Normative references
The following documents are indispensable for the application of this document.
For dated references, only the dated version applies to this document. For
undated references, the latest edition (including all amendments) applies to this
document.
GB/T 6624, Standard method for measuring the surface quality of polished
silicon slices by visual inspection
GB/T 12964, Monocrystalline silicon polished wafers
GB/T 14139, Silicon epitaxial wafers
GB/T 14142, Test method for crystallographic perfection of epitaxial layers in
silicon. Etching technique
GB/T 14264, Semiconductor materials. Terms and definitions
GB/T 30453, Metallographs collection for original defects of crystalline silicon
3 Terms and definitions
Terms and definitions determined by GB/T 14264 are applicable to this
document.
4 Grid cell layout
4.1 Grid cell plan
4.1.1 The grid, which is positioned by the wafer center, defines two grids: one
for the wafer without main reference plane (that is, the main positioning
Figure 1 -- Grid diagram without main reference plane wafer
4.2 Wafer without main reference plane
4.2.1 The grid pattern without main reference plane wafer is shown in Figure 1.
The grid pattern is drawn by concentric circles and radial division cells from the
relative diameters that are specified in Table 1.
4.2.2 In Table 1, column 1 shows the circle numbers, 01~18; column 2 shows
the division cell numbers on the outermost ring of the numbered circle; column
3 shows the division line angle; column 4 shows the total division cell number
of the corresponding numbered circle; column 5 shows the area ratio that is
included in the circle of corresponding serial number, the value of which is the
total number of division cells that are contained in the circle divided by the total
number of division cells of the grid 1 000; column 6 shows the relative diameter,
the value of which is the square root of the included area ratio.
4.3 Wafer with main reference plane
4.3.1 For wafers with main reference plane, use the standard included angle of
43.2° as the central angle that corresponds to the intersection of all the arcs of
the wafer and the horizontal chord. The standard angle is chosen because the
angle is between the maximum and minimum central angles corresponding to
the main reference surface chords that are specified in the nominal diameters
of 100 mm, 125 mm, 150 mm and 200 mm which are specified in GB/T 12964,
as shown in Figure 2. If a qualified mass area whose radius is 3 mm (or 4 mm)
less than the nominal radius of the wafer is used, in no case will the grid exceed
the edge of the main reference plane area of the wafer.
Cell (18, 01)
Cell (18, 100)
......
Source: Above contents are excerpted from the full-copy PDF -- translated/reviewed by: www.ChineseStandard.net / Wayne Zheng et al.
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