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GB/T 38345-2019 PDF English

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GB/T 38345-2019: General design requirements of semiconductor integrate circuit for space application
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Basic data

Standard ID GB/T 38345-2019 (GB/T38345-2019)
Description (Translated English) General design requirements of semiconductor integrate circuit for space application
Sector / Industry National Standard (Recommended)
Classification of Chinese Standard V25
Classification of International Standard 49.035
Word Count Estimation 22,261
Date of Issue 2019-12-31
Date of Implementation 2020-07-01
Issuing agency(ies) State Administration for Market Regulation, China National Standardization Administration

GB/T 38345-2019: General design requirements of semiconductor integrate circuit for space application




---This is a DRAFT version for illustration, not a final translation. Full copy of true-PDF in English version (including equations, symbols, images, flow-chart, tables, and figures etc.) will be manually/carefully translated upon your order.
General design requirements of semiconductor integrate circuit for space application ICS 49.035 V25 National Standards of People's Republic of China General design requirements for aerospace semiconductor integrated circuits Generaldesign requirementsofsemiconductorintegratecircuitfor 2019-12-31 release 2020-07-01 implementation State Administration of Market Supervision Published by the National Standardization Administration

Contents

Foreword III 1 Scope 1 2 Normative references 1 3 Design process and content 1 3.1 Design Process 1 3.2 Design Content 3 4 General design requirements 6 4.1 Structural design requirements 6 4.2 Logic and Circuit Design Requirements 6 4.3 Layout Design Requirements 7 4.4 Package Design Requirements 7 4.5 Reliability design requirements 8 4.6 Testability Design Requirements 10 Appendix A (Normative) Data Sheet 11 Appendix B (informative) Design Guide 12

Foreword

This standard was drafted in accordance with the rules given in GB/T 1.1-2009. Please note that some elements of this document may involve patents. The issuer of this document is not responsible for identifying these patents. This standard is proposed and managed by the National Aerospace Technology and Application Standardization Technical Committee (SAC/TC425). This standard was drafted. Beijing Institute of Microelectronics Technology. The main drafters of this standard. Chen Lei, Ni Weilin, Li Xinyun, Zhang Dongming, Lin Jianjing, Tian Junyang, Ma Jianhua, Zhuang Wei, Li Jiancheng, Li Xuewu, Kong Yan and Zhang Tieliang. General design requirements for aerospace semiconductor integrated circuits

1 Scope

This standard specifies the general design requirements for aerospace semiconductor integrated circuits, including structural design, logic and circuit design, layout design, Package design, reliability design, and testability design requirements. This standard applies to the design requirements of aerospace semiconductor integrated circuits, and does not apply to special circuit design requirements.

2 Normative references

The following documents are essential for the application of this document. For dated references, only the dated version applies to this article Pieces. For undated references, the latest version (including all amendments) applies to this document. IEEEStd1149.1-2001 IEEE standard test interface and boundary scan structure (IEEEStandardTestAccessPort andBoundary-ScanArchitecture)

3 Design process and content

3.1 Design process Aerospace semiconductor integrated circuit design generally includes structural design, logic design, circuit design, layout design, and package design. In a The flow of fault-tolerant systems with design requirements allows special implementation for different types of integrated circuits in aerospace. During the design process Adhere to existing standards and norms. Feasibility and risk analysis of aerospace user requirements to verify the rationality of their functional and performance requirements. design Should follow the perfect flow requirements, for different types of aerospace circuits, the activities of each stage can be tailored. To ensure the design Correctness, computer simulation and verification of the design results of each stage. Decompose design input requirements into each design by task Design stage, to achieve and verify each step until the completion of all the goals and requirements of aerospace semiconductor integrated circuits. Figure 1 shows the design process intention.
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