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| GB/T 36477-2018 | English | 359 |
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Semiconductor integrated circuit -- Measuring methods for flash memory
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GB/T 36477-2018
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Basic data | Standard ID | GB/T 36477-2018 (GB/T36477-2018) | | Description (Translated English) | Semiconductor integrated circuit -- Measuring methods for flash memory | | Sector / Industry | National Standard (Recommended) | | Classification of Chinese Standard | L56 | | Classification of International Standard | 31.200 | | Word Count Estimation | 18,196 | | Date of Issue | 2018-06-07 | | Date of Implementation | 2019-01-01 | | Issuing agency(ies) | State Administration for Market Regulation, China National Standardization Administration |
GB/T 36477-2018: Semiconductor integrated circuit -- Measuring methods for flash memory---This is a DRAFT version for illustration, not a final translation. Full copy of true-PDF in English version (including equations, symbols, images, flow-chart, tables, and figures etc.) will be manually/carefully translated upon your order.
Semiconductor integrated circuit--Measuring methods for flash memory
ICS 31.200
L56
National Standards of People's Republic of China
Semiconductor integrated circuit
Flash memory test method
Published on.2018-06-07
2019-01-01 implementation
State market supervision and administration
China National Standardization Administration issued
Content
Foreword I
1 Scope 1
2 Normative references 1
3 Terms and Definitions 1
4 General requirements 1
4.1 Equipment and conditions 1
4.2 Electrical parameter test vector 1
5 Detailed requirements 2
5.1 Output High Level Voltage and Output Low Level Voltage 2
5.2 Input high level voltage and input low level voltage 3
5.3 Input High Level Current and Input Low Level Current 5
5.4 Output High Level Current and Output Low Level Current 5
5.5 Output High Resistance State Current 6
5.6 Supply current and leakage current 6
5.7 Transmission time 7
5.8 Establishing time and holding time 9
5.9 Delay time 11
5.10 Effective time (if applicable) 11
5.11 Memory Specific Time 11
5.12 Storage Unit 0 Change 1 Function 11
5.13 Storage unit 1 becomes 0 function 12
5.14 Special Data Graphics Features 13
Appendix A (informative) Flash memory test process 14
Foreword
This standard was drafted in accordance with the rules given in GB/T 1.1-2009.
Please note that some of the contents of this document may involve patents. The issuing organization of this document is not responsible for identifying these patents.
This standard was proposed by the Ministry of Industry and Information Technology of the People's Republic of China.
This standard is under the jurisdiction of the National Semiconductor Device Standardization Technical Committee (SAC/TC78).
This standard was drafted. China Electronics Technology Standardization Institute, Semiconductor Manufacturing International (Shanghai) Co., Ltd., Shanghai Fudan
Microelectronics Group Co., Ltd., Shenzhen Zhongxing Microelectronics Technology Co., Ltd., Beijing Zhaoyi Innovation Technology Co., Ltd., Fudan University
Xuexing, ZTE Corporation.
The main drafters of this standard. Yan Duan Duan, Chen Dawei, Zhong Mingqi, Luo Xiaoyu, Feng Guangtao, Ni Wei, Zhao Zijian, Dong Yi, Tian Wanting, Gao Shuo,
Hey, Liu Gang.
Semiconductor integrated circuit
Flash memory test method
1 Scope
This standard specifies the basic methods for testing the electrical parameters, time parameters and memory unit functions of semiconductor integrated circuit flash memories.
This standard applies to the testing of electrical parameters, time parameters and memory cell functions of flash memory in the field of semiconductor integrated circuits.
2 Normative references
The following documents are indispensable for the application of this document. For dated references, only dated versions apply to this article.
Pieces. For undated references, the latest edition (including all amendments) applies to this document.
GB/T 17574-1998 Semiconductor device integrated circuits - Part 2. Digital integrated circuits
3 Terms and definitions
The following terms and definitions apply to this document.
3.1
Flash memory flashmemory
A non-volatile memory with electrically erasable and programmable features, the main feature is that it can quickly read and write large blocks.
3.2
Worst case condition worstcasecondition
The most unfavorable condition of the power supply voltage, input signal, and load within the nominal range is simultaneously added to the measured flash memory.
4 General requirements
4.1 Equipment and conditions
The electrical characteristics test of the flash memory is not limited to the specific mode and equipment, and should be performed on the automatic test system, including but not limited to measurement
Test machine, probe station, high and low temperature impact equipment and oscilloscope.
In the electrical parameter test, the test vector should be developed so that the flash memory is in the required working state before starting the test.
The general requirements for vectors should be in accordance with 4.2, and the test procedure is given in Appendix A.
Unless otherwise specified, the flash memory test shall be in the range of 86 kPa to 106 kPa ambient humidity and 35% to 80% relative humidity.
In progress. The test temperature shall comply with the provisions of 2.1.2 of Section IV of GB/T 17574-1998.
The worst case when testing different parameters may be different. If not all the test conditions take the most unfavorable value, then use the "part"
Distinguish between the worst-case conditions and should indicate the deviation from the worst case.
4.2 Electrical parameter test vector
The vector used should be the correct vector for the functional test and the output logic state meets the design specifications.
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