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GB/T 33657-2017 English PDF

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GB/T 33657-2017: Nanotechnologies -- Electrical operating parameter test specification of wafer level nano-scale phase change memory cells
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PDF similar to GB/T 33657-2017


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Basic data

Standard ID GB/T 33657-2017 (GB/T33657-2017)
Description (Translated English) Nanotechnologies -- Electrical operating parameter test specification of wafer level nano-scale phase change memory cells
Sector / Industry National Standard (Recommended)
Classification of Chinese Standard L56
Classification of International Standard 31.200
Word Count Estimation 14,191
Date of Issue 2017-05-12
Date of Implementation 2017-12-01
Issuing agency(ies) General Administration of Quality Supervision, Inspection and Quarantine of the People's Republic of China, Standardization Administration of the People's Republic of China

GB/T 33657-2017: Nanotechnologies -- Electrical operating parameter test specification of wafer level nano-scale phase change memory cells


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Nanotechnologies - electrical operating parameter test specification wafer level nano-scale phase change memory cells ICS 31.200 L56 National Standards of People's Republic of China Nanoscale wafer - level nano - scale phase - change storage Test specification for unit electrical operating parameters 2017-05-12 released 2017-12-01 implementation General Administration of Quality Supervision, Inspection and Quarantine of the People's Republic of China China National Standardization Management Committee released Directory Preface III Introduction IV 1 Scope 1 2 normative reference document 1 3 Terms and definitions 1 4 test equipment and equipment 2 5 Test sample structure 3 Selection of test parameters 3 7 Test Flow 4 8 Test Report 5 Appendix A (informative) Construction of phase change memory unit test system 6 Appendix B (informative) Initialization method for phase change memory cells 7

Foreword

This standard is drafted in accordance with the rules given in GB/T 1.1-2009. Please note that some of the contents of this document may involve patents. The issuer of this document does not assume responsibility for the identification of these patents. This standard is proposed by the Chinese Academy of Sciences. This standard is under the national standard of nanotechnology standardization technical committee (SAC/TC279). The drafting of this standard. Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences. The main drafters of this standard. Chen Yifeng, Chen Xiaogang, Song Zhitang.

Introduction

Phase change memory is a nonvolatile memory whose memory cell can be used in the high impedance of the amorphous state under the thermodynamics of the external electric field Low resistance between the polycrystalline high-speed reversible structure changes, changes in resistance before and after the difference of up to 10 times, in order to achieve data storage Features. The electrical operating parameters of the phase change memory cell include write operating parameters and wiping operating parameters. These parameters can be tested by this standard Standardize accurate extraction. They can not only effectively evaluate several performance indicators of phase change memory consisting of phase change memory cells, but also Phase change memory drive circuit, readout circuit and storage array design basis. Phase change memory cells can be used in a wide range of phase change materials, the device structure can be achieved is not unique. The test specifications of this standard can be The performance characterization of different phase change materials and different phase change unit structures and the monitoring of process stability during phase change memory production For effective means. As the operating current and phase change memory cell electrode size close relationship, too large electrode size will lead to operating current and power consumption surge, The corresponding electrical operating parameters test specifications may also exceed the scope of this standard. Specific to this standard, we develop suitable for use in memory Phase change memory cell with an electrode scale of less than 100 nm, and a phase change memory cell of 100 nm to 300 nm can also be executed with reference to this standard. Nanoscale wafer - level nano - scale phase - change storage Test specification for unit electrical operating parameters

1 Scope

This standard specifies the wafer test specification for read and write parameters of nanoscale phase change memory cells. The test results can be used to characterize phase change The electrical operability of the storage material or device. This standard applies to the sulfur-based compounds as the main raw material, based on semiconductor wafer manufacturing process electrode size is less than 100nm Of the phase change memory cell, 100nm ~ 300nm phase change memory cell can also refer to the implementation of this standard. This standard does not apply to storage units that contain peripheral drive circuits.

2 normative reference documents

The following documents are indispensable for the application of this document. For dated references, only the dated edition applies to this article Pieces. For undated references, the latest edition (including all modifications) applies to this document. GB 4793.1-2007 Safety requirements for electrical equipment for measurement, control and laboratory use - Part 1. General requirements (IEC 61010 - 1..2001, IDT) GB/T 9178 Integrated Circuit Terms GB/T 11464 terminology for electronic measuring instruments Basic terms of GB/T 13970 digital instrumentation GB/T 13978 Digital Multimeter

3 terms and definitions

GB/T 9178, GB/T 11464, GB/T 13970 and GB/T 13978 and the following terms and definitions apply to this file. 3.1 Phase change memory unit phasechangememorycel A memory device capable of reversibly structuring a change between a polycrystalline phase and an amorphous phase under the thermodynamics of an external electric field unit. 3.2 Write operation resetoperation Phase change memory cell in the external electric field from the polycrystalline transition to amorphous process. 3.3 Wipe operation setoperation Phase change storage unit in the role of external electric field from amorphous to polycrystalline process. 3.4 Read operation readoperation By measuring the storage state of the resistance readout unit of the phase change memory cell.

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