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GB/T 30856-2025 English PDF

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GB/T 30856-2025: GaAs substrates for LED epitaxial chips
Status: Valid

GB/T 30856: Evolution and historical versions

Standard IDContents [version]USDSTEP2[PDF] delivered inStandard Title (Description)StatusPDF
GB/T 30856-2025English219 Add to Cart 3 days [Need to translate] GaAs substrates for LED epitaxial chips Valid GB/T 30856-2025
GB/T 30856-2014English329 Add to Cart 3 days [Need to translate] GaAs substrates for LED epitaxial chips Valid GB/T 30856-2014

Basic data

Standard ID GB/T 30856-2025 (GB/T30856-2025)
Description (Translated English) GaAs substrates for LED epitaxial chips
Sector / Industry National Standard (Recommended)
Classification of Chinese Standard H83
Classification of International Standard 29.045
Word Count Estimation 10,169
Date of Issue 2025-08-01
Date of Implementation 2026-02-01
Older Standard (superseded by this standard) GB/T 30856-2014
Issuing agency(ies) State Administration for Market Regulation, Standardization Administration of China

GB/T 30856-2025: GaAs substrates for LED epitaxial chips

---This is an excerpt. Full copy of true-PDF in English version (including equations, symbols, images, flow-chart, tables, and figures etc.), auto-downloaded/delivered in 9 seconds, can be purchased online: https://www.ChineseStandard.net/PDF.aspx/GBT30856-2025
ICS 29.045 CCSH83 National Standard of the People's Republic of China Replaces GB/T 30856-2014 GaAs substrates for LED epitaxial chips Released on August 1, 2025 Implementation on February 1, 2026 State Administration for Market Regulation The National Standardization Administration issued

Preface

This document is in accordance with the provisions of GB/T 1.1-2020 "Guidelines for standardization work Part 1.Structure and drafting rules for standardization documents" Drafting. This document replaces GB/T 30856-2014 "GaAs substrates for LED epitaxial chips". In addition to structural adjustments and editorial changes, the main technical changes are as follows. a) The specifications have been changed (see 4.1.2, 4.3 of the.2014 edition); b) The requirements for electrical performance have been changed (see 5.1, 4.4 of the.2014 edition); c) The requirements for reference surfaces and cutouts have been changed (see 5.2, 4.4 of the.2014 edition); d) Changed the requirements for surface crystal orientation and crystal orientation deviation (see 5.3, 4.5 of the.2014 edition); e) Changed the requirements for dislocation density (see 5.4, 4.6 of the.2014 edition); f) The geometric dimension requirements have been changed (see 5.5, 4.9 of the.2014 edition); g) Changed the surface quality requirements (see 5.6, 4.7 of the.2014 edition); h) The test method for electrical properties has been changed (see 5.2, 4.8 of the.2014 edition); i) The inspection method for incisions has been changed (see 6.2.3, 5.5.2 of the.2014 edition); j) The inspection rules have been changed (see Chapter 7, Chapter 6 of the.2014 edition); k) The logo has been changed (see 8.1, 7.1 of the.2014 edition); l) The packaging has been changed (see 8.2, 7.2 of the.2014 edition); m) Deleted the method of measuring substrate resistivity using a sheet resistance meter and the method of measuring substrate room temperature carrier concentration and mobility. Method (see Appendices A and B of the.2014 edition). Please note that some of the contents of this document may involve patents. The issuing organization of this document does not assume the responsibility for identifying patents. This document was jointly issued by the National Technical Committee on Semiconductor Equipment and Materials Standardization (SAC/TC203) and the National Technical Committee on Semiconductor Equipment and Materials Standardization (SAC/TC203). It is jointly proposed and coordinated by the Materials Subcommittee of the Chemical Technology Committee (SAC/TC203/SC2). This document was drafted by. Nanjing Jiyi Semiconductor Technology Co., Ltd., Zhongshan Dehua Chip Technology Co., Ltd., Guangdong Pioneer Microelectronics Technology Co., Ltd. Technology Co., Ltd., Quanlei Optoelectronics Co., Ltd., Shandong Inspur Huaguang Optoelectronics Co., Ltd., Yunnan Xinyao Semiconductor Materials Co., Ltd. Dongguan Institute of Optoelectronics, Peking University, Institute of Semiconductors, Chinese Academy of Sciences, Daqing Yitai Semiconductor Materials Co., Ltd., and Easystar Optoelectronics (Guangdong) Co., Ltd., Shenzhen Guanke Technology Co., Ltd., and Guangdong Zhongyang Optoelectronics Technology Co., Ltd. The main drafters of this document are. Zhao Zhongyang, Zheng Hongjun, Feng Jiafeng, Yu Huiyong, Liu Jianqing, Sun Xuefeng, Zhang Shuangxiang, Yan Baohua, Lin Zuoliang, Liu Qiang, Ma Jinfeng, Zhao Youwen, Zhao Chunfeng, Peng Lu, Xu Baozhou, Lan Qing, and Chen Huang. This document was first published in.2014 and this is the first revision. GaAs substrates for LED epitaxial chips

1 Scope

This document specifies the technical requirements, test methods, Inspection rules, marking, packaging, transportation, storage and accompanying documents and order form contents. This document applies to the production, testing and quality evaluation of gallium arsenide single crystal substrates for LED epitaxial chips.

2 Normative references

The contents of the following documents constitute the essential clauses of this document through normative references in this document. For referenced documents without a date, only the version corresponding to that date applies to this document; for referenced documents without a date, the latest version (including all amendments) applies to This document. GB/T 191 Pictorial markings for packaging, storage and transportation GB/T 1555 Method for determining crystal orientation of semiconductor single crystals GB/T 2828.1-2012 Sampling procedures for inspection by attributes Part 1.Sampling for batch inspection based on acceptance quality limit (AQL) plan GB/T 4326 Measurement method of Hall mobility and Hall coefficient of extrinsic semiconductor single crystals GB/T 6618 Test method for thickness and total thickness variation of silicon wafers GB/T 6620 Non-contact test method for silicon wafer warpage GB/T 6621 Test method for silicon wafer surface flatness GB/T 6624 Visual inspection method for surface quality of polished silicon wafers GB/T 8760 Test method for dislocation density of gallium arsenide single crystals GB/T 11093 Liquid-sealed Czochralski gallium arsenide single crystals and cut wafers GB/T 13387 Measurement method for reference plane length of silicon and other electronic material wafers GB/T 13388 X-ray test method for crystallographic orientation of silicon wafer reference surface GB/T 14140 Silicon wafer diameter measurement method GB/T 14264 Terminology of Semiconductor Materials GB/T 14844 Semiconductor material designation method GB/T 20228 Gallium arsenide single crystal

3 Terms and Definitions

The terms and definitions defined in GB/T 14264 apply to this document.

4 Classification and brand

4.1 Classification 4.1.1 Gallium arsenide substrates are classified into n-type and p-type according to their conductivity type. 4.1.2 GaAs substrates are classified into five sizes based on diameter. 50.8mm, 76.2mm, 100.0mm, 150.0mm, and.200.0mm.

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