GB/T 45716-2025 English PDF

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GB/T 45716-2025: Semiconductor devices - Bias-temperature instability test for metal-oxide semiconductor field-effect transistors (MOSFETs)
Status: Valid

Standard ID	USD	BUY PDF	Lead-Days	Standard Title (Description)	Status
GB/T 45716-2025	294	Add to Cart	3 days	Semiconductor devices - Bias-temperature instability test for metal-oxide semiconductor field-effect transistors (MOSFETs)	Valid

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Basic data

Standard ID: GB/T 45716-2025 (GB/T45716-2025)
Description (Translated English): Semiconductor devices - Bias-temperature instability test for metal-oxide semiconductor field-effect transistors (MOSFETs)
Sector / Industry: National Standard (Recommended)
Classification of Chinese Standard: L40
Classification of International Standard: 31.080.01
Word Count Estimation: 14,193
Date of Issue: 2025-05-30
Date of Implementation: 2025-09-01
Issuing agency(ies): State Administration for Market Regulation, China National Standardization Administration

GB/T 45716-2025: Semiconductor devices - Bias-temperature instability test for metal-oxide semiconductor field-effect transistors (MOSFETs)

---This is a DRAFT version for illustration, not a final translation. Full copy of true-PDF in English version (including equations, symbols, images, flow-chart, tables, and figures etc.) will be manually/carefully translated upon your order.
ICS 31.080.01 CCSL40 National Standard of the People's Republic of China Semiconductor devices Metal oxide semiconductor field effect crystal Bias temperature instability test of MOSFETs Released on 2025-05-30 2025-09-01 Implementation State Administration for Market Regulation The National Standardization Administration issued

Table of contents

Preface III 1 Scope 1 2 Normative references 1 3 Terms and Definitions 1 4 Test equipment 3 4.1 Equipment 3 4.2 Processing requirements 3 5 Test sample 3 5.1 Sample 3 5.2 Packaging 4 5.3 Anti-static protection circuit 4 6 Procedure 4 6.1 Initial Measurement and Reading Point Measurement 4 6.2 Test 5 6.3 Field MOSFET Test Notes 6 6.4 Criteria 6 Appendix A (Informative) Wafer Level Reliability Test (WLR Test) 7 A.1 Purpose of Wafer Level Reliability Test (WLR Test) 7 A.2 Final test time 7 References 8

Foreword

This document is in accordance with the provisions of GB/T 1.1-2020 "Guidelines for standardization work Part 1.Structure and drafting rules for standardization documents" Drafting. This document is equivalent to IEC 62373.2006 "Bias temperature stability of metal oxide semiconductor field effect transistors (MOSFET) "Ecological Experiment". This document adds a chapter on “Normative References”. The following minimal editorial changes were made to this document. --- In order to coordinate with the existing standards, the name of the standard will be changed to "Semiconductor Device Metal Oxide Semiconductor Field Effect Transistor (MOS- Bias Temperature Instability Test of FETs. Please note that some of the contents of this document may involve patents. The issuing organization of this document does not assume the responsibility for identifying patents. This document was proposed by the Ministry of Industry and Information Technology of the People's Republic of China. This document is under the jurisdiction of the National Semiconductor Device Standardization Technical Committee (SAC/TC78). This document was drafted by. The Fifth Institute of Electronics of the Ministry of Industry and Information Technology, Hebei Beixin Semiconductor Technology Co., Ltd., Shanghai Jiaotong University, Institute of Microelectronics, Chinese Academy of Sciences, Xiamen Xinyang Technology Co., Ltd., Shenzhen Weizhao Semiconductor Co., Ltd., Zhejiang Langde Electronic Technology Co., Ltd. Co., Ltd., and the 13th Institute of China Electronics Technology Group Corporation. The main drafters of this document are. En Yunfei, Gao Li, Zhang Xiaowen, Lai Ping, Chai Zhi, Lin Xiaoling, Chen Yiqiang, Zhou Shengze, Gao Jinhuan, Ren Pengpeng, Du Anyan, Li Weicong, Chen Lei, Ran Honglei. Semiconductor Devices Metal Oxide Semiconductor Field Effect Transistor Bias Temperature Instability Test of (MOSFETs)

1 Scope

This document describes the bias temperature instability (BTI) test method for metal oxide semiconductor field effect transistors (MOSFETs).

2 Normative references

This document has no normative references.

3 Terms and definitions

The following terms and definitions apply to this document. 3.1 Vth-ci When the drain-source voltage is in the linear region or the recommended typical operating voltage, the drain current is equal to 0.1 times the gate width (single The gate-source voltage at 100 μm. Note. This definition is expressed by formula (1). Vth-ci=VGS (1) Where. VGS---gate-source voltage under the conditions of formula (2). IDS = 0.1 × W (2) Where. IDS---drain-source current; W ---Gate width, in micrometers (mm). The drain-source voltage is in the linear region or the recommended typical operating voltage. The linear region means approximately VDS=0.05V,..,0.1V. 3.2 Vth-ext When the drain-source voltage is in the linear region or the recommended typical value of the operating voltage, the slope of the IDS-VGS curve is the largest. The maximum slope is drawn as a straight line through this point and extrapolated to the gate-source voltage when IDS=0. Note. Figure 1 shows the relationship between gate-source voltage (VGS) and drain-source current (IDS). The slope of the IDS-VGS curve is maximum at around VGS=0.3V. The dotted line is an extrapolated line with the same slope as the maximum slope of the IDS-VGS curve. The value where the extrapolated line intersects the straight line (x-axis) of IDS=0 is the extrapolated threshold voltage. ......

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