GB/T 26067-2010 English PDF

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GB/T 26067-2010: Standard test method for dimensions of notches on silicon wafers
Status: Valid

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Basic data

Standard ID: GB/T 26067-2010 (GB/T26067-2010)
Description (Translated English): Standard test method for dimensions of notches on silicon wafers
Sector / Industry: National Standard (Recommended)
Classification of Chinese Standard: H17
Classification of International Standard: 29.045
Word Count Estimation: 10,132
Date of Issue: 1/10/2011
Date of Implementation: 10/1/2011
Quoted Standard: GB/T 2828.1; GB/T 14264
Regulation (derived from): Announcement of Newly Approved National Standards 2011 No. (No. 166 overall) 1
Issuing agency(ies): General Administration of Quality Supervision, Inspection and Quarantine of the People's Republic of China, Standardization Administration of the People's Republic of China
Summary: This Standard specifies the determination of non-destructive testing methods required by the standard limits of silicon reference notches are satisfied. The standard test for measuring principle is equally applicable to other incision size. The standard size of 0. 1mm in the object plane, it will form a 2. 0mm image on the projection screen after amplification by 20 times, will produce 5. 0mm rear projection magnified by 50 times. This standard can be found in the smallest size cutout detail on the contour. This standard does not provide test cuts the top radius of curvature.

GB/T 26067-2010: Standard test method for dimensions of notches on silicon wafers

---This is a DRAFT version for illustration, not a final translation. Full copy of true-PDF in English version (including equations, symbols, images, flow-chart, tables, and figures etc.) will be manually/carefully translated upon your order.
Standard test method for dimensions of notches on silicon wafers ICS 29.045 H17 National Standards of People's Republic of China Wafer size cut test methods Issued on. 2011-01-10 2011-10-01 implementation Administration of Quality Supervision, Inspection and Quarantine of People's Republic of China Standardization Administration of China released

Foreword

The standard equipment by the National Standardization Technical Committee and the Technical Committee material of the semiconductor material (SAC/TC203/SC2) centralized. This standard was drafted. Grinm Semiconductor Materials Co., universal silicon peak Electronics Co., Ltd. The main drafters of this standard. Du, Sun Yan, Lu Liyan, Chunlan floor. Wafer size cut test methods

1 Scope

1.1 standard provides a qualitative determination of silicon reference notches meets the standard requirements of the limits of non-destructive testing methods. This method Test measurement principle equally applicable to other incision size. 1.2 standard size of 0.1mm when the object plane, passed 20 times magnification 2.0mm image will be formed on the projection screen pass Will produce 5.0mm over the projected 50-fold magnification. This method can be found in the smallest details of the size of the cut contour. 1.3 This standard does not provide a test cut to the top of the radius of curvature.

2 Normative references

The following documents for the application of this document is essential. For dated references, only the dated version suitable for use herein Member. For undated references, the latest edition (including any amendments) applies to this document. GB/T 2828.1 Sampling procedures for inspection - Part 1. by acceptance quality limit (AQL) retrieval batch inspection sampling plan GB/T 14264 semiconductor material terms

3 Terms and Definitions

Terms and definitions GB/T 14264 apply to this document defined.

4 Summary of Method

4.1 method is to use a series of contour cutout template on the screen and the projector projection on the stage of the wafer under test is compared, thus Get tested wafer notch meets the specified requirements. 4.2 silicon wafers cut edge of the wafer position locating projection and positioning pin projection tangent. At this time, the projection of the incision should be located in the bottom or lower A template to cut and depth has been set baseline projection and edge of the wafer at or above the contour plate in addition a baseline. 4.3 repositioning wafer with the wafer edge and contour templates "wafer peripheral line" coincidence, then cut the bottom of the projector should be in outline mode Board cut line between the deepest and most shallow incision line. A series of cuts and incisions on the projection angle of the angle cut edge contour of the template compared to 4.4, and wherein the selected template contour cut edges The best fit the corner angle as the angle of the cut. 4.5 can also use the instrument to cut the shape of the edge profile for accurate measurement, specific See Appendix A.

5 disturbances

5.1 cut edges of any contamination or other rough material through the optical path of the projected image will produce distortion, resulting in an error is detected cut Port size. 5.2 cut position relative to the center of the wafer alignment is accurate cut parameters important part. 5.3 grinding tool wear and process variation could lead to the cut edge is not straight, so that the radius of the cut vertex is not unique. In this case, Next, with special attention to the positioning cut the projected image in the correct position on the contour of the template. 5.4 in accordance with the specific crystal orientation tumbling edge of the wafer notch is formed on a silicon wafer method correctly positioned. Therefore, straight cut precision of critical dimension ......

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