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GB/T 15879.5-2018 English PDF

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GB/T 15879.5-2018: Mechanical standardization of semiconductor devices -- Part 5: Recommendations applying to tape automated bonding (TAB) of integrated circuits
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GB/T 15879.5-2018759 Add to Cart 4 days Mechanical standardization of semiconductor devices -- Part 5: Recommendations applying to tape automated bonding (TAB) of integrated circuits Valid

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Basic data

Standard ID: GB/T 15879.5-2018 (GB/T15879.5-2018)
Description (Translated English): Mechanical standardization of semiconductor devices -- Part 5: Recommendations applying to tape automated bonding (TAB) of integrated circuits
Sector / Industry: National Standard (Recommended)
Classification of Chinese Standard: L55
Classification of International Standard: 31.200
Word Count Estimation: 38,386
Date of Issue: 2018-09-17
Date of Implementation: 2019-04-01
Older Standard (superseded by this standard): GB/T 15879-1995
Issuing agency(ies): State Administration for Market Regulation, China National Standardization Administration

GB/T 15879.5-2018: Mechanical standardization of semiconductor devices -- Part 5: Recommendations applying to tape automated bonding (TAB) of integrated circuits


---This is a DRAFT version for illustration, not a final translation. Full copy of true-PDF in English version (including equations, symbols, images, flow-chart, tables, and figures etc.) will be manually/carefully translated upon your order.
Mechanical standardization of semiconductor devices - Part 5. Recommendations to to tape automated bonding (TAB) of integrated circuits ICS 31.200 L55 National Standards of People's Republic of China Replace GB/T 15879-1995 Mechanical standardization of semiconductor devices - Part 5. Recommended values for integrated circuit tape automated soldering (TAB) Mechanicalstandardizationofsemiconductordevices-Part 5.Recommendations (IEC 60191-5.1997, Mechanical standardization of semiconductor devices-Part 5.Recommendationsapplyingtointegratedcircuitpackages Usingtapeautomatedbonding(TAB), IDT) 2018-09-17 released.2019-04-01 implementation State market supervision and administration China National Standardization Administration issued

Content

Foreword III 1 Scope 1 2 Terms and Definitions 1 3 Description of automatic tape welding (TAB) 2 4 size requirements 2 4.1 Membrane size 2 4.2 Registration hole 3 4.3 Body size 3 4.4 Test Pad Pattern 3 4.5 Outer lead pattern 3 4.6 Maximum number of leads 4 5 variable combination code 4 6 Internal lead welding, external lead welding requirements (ILB and OLB) 4 Appendix A (informative) Summary of recommended values for TAB package structure (very large) 23 Appendix B (informative) Summary of recommended values for TAB package structure (wide body type) 25 Appendix C (informative) External lead number 27 Appendix D (informative) Test pad number 31

Foreword

The Mechanical Standardization of Semiconductor Devices has been or is planned to be released as follows. --- Part 1. General rules for drawing outlines of discrete device packages; --- Part 2. Size; --- Part 3. General rules for the drawing of outline drawings of integrated circuits; --- Part 4. Classification and coding system for the outline of semiconductor device packages; ---Part 5. Recommended values for automated tape carrier integrated soldering (TAB); --- Part 6. General rules for drawing outlines of surface mount semiconductor device packages. This part is the fifth part of "Mechanical Standardization of Semiconductor Devices". This part uses the translation method equivalent to IEC 60191-5.1997 "Mechanical standardization of semiconductor devices Part 5. Using carrier tapes Recommended values for integrated circuit packages for dynamic soldering (TAB). This part is drafted in accordance with the rules given in GB/T 1.1-2009. This part replaces GB/T 15879-1995 "Mechanical standardization of semiconductor devices - Part 5. (TAB) recommended value. Compared with GB/T 15879-1995, the main technical changes are as follows. --- Increase in the scope "This section applies to the finished unit of the manufacturer to supply the user, the interconnection of the integrated circuit (IC) to the frame (introduction Wire welding) is not explicitly required" (see Chapter 1); ---Remove the terms of guide hole, inner lead soldering, outer lead soldering, isolation strip, lead, sliding carrier, cutting, lead forming, etc. Wheel holes, inner leads, outer leads or cut windows, support rings, body dimensions, outer leads, alignment holes, test pads, etc. (see Chapter 2, version 2.2 of the.1995 edition; ---The carrier tape width is changed from "8mm, 16mm, 19mm, 35mm" (see 3.1 in GB/T 15879-1995) to "35mm, 48mm and 70mm" (see 4.1, 3.1 of the.1995 edition); --- Increase the size and tolerances associated with film specifications, alignment holes, body dimensions and tolerances, pad patterns related dimensions and tolerances, external references Line pitch related dimensions and tolerances, maximum number of lead combinations (see Chapter 4); --- Increase the variable combination code (see Chapter 5); --- Increase the internal and external lead welding requirements (see Chapter 6); --- Increase the recommended value of ultra-large TAB package, wide body TAB package recommended value, outer lead number, test pad number (see this section) Appendix A, Appendix B, Appendix C, Appendix D). This section has the following editorial changes. ---Modified standard name; --- Modified the error in the header of Table 2, the body size identification letters from A, B, C, D, F, G, H, J, K, corrected to A, B, C, D, E, F, G, H, J, K; --- Modified the error in the header of Table 5, the number of test pads in the header of Table 5 are all M1, according to the film specifications, test pad pitch The difference is M1, M2, M3, M4; ---Modify the error in Table A.1, correct the outer lead pitch of BB-26 from 0.4mm to 0.15mm, and BB-36 from 0.4mm. Positive 0.15mm, BD-46 is corrected from 0.16mm to 0.15mm; --- Appendix B removes the completely repeated EH-46, and the wrong size EJ-46 of the body size (40mm × 40mm). This part was proposed by the Ministry of Industry and Information Technology of the People's Republic of China. This part is under the jurisdiction of the National Semiconductor Device Standardization Technical Committee (SAC/TC78). This section drafted by. China Electronics Technology Standardization Institute, China Electronics Technology Group Corporation, 58th Institute, Sichuan Jiejie General Electric Co., Ltd. The main drafters of this section. Wang Qi, Ding Rongzhen, Shuai, Li Yi, Wang Bo. The previous versions of the standards replaced by this section are. ---GB/T 15879-1995. Mechanical standardization of semiconductor devices - Part 5. Recommended values for integrated circuit tape automated soldering (TAB)

1 Scope

This part of the "Mechanical Standardization of Semiconductor Devices" specifies the use of tape automated bonding (TAB) as the main component of the structure and interconnection. Recommended values for integrated circuit packages. This section applies to the finished unit supplied by the manufacturer to the user. The interconnection of the integrated circuit (IC) to the carrier tape (internal lead soldering) is not clear. Claim.

2 Terms and definitions

The following terms and definitions apply to this document. 2.1 Chip (or die) chip(ordie) At least one integrated circuit is included from a silicon wafer containing an array of devices. 2.2 Tape carrier tapecarrier(tape) A strip of mechanical support and electrical connection of the chip formed by laminating an insulating material and a conductive material having a certain pattern. Strip pack Contains a series of graphics, each of which is a unit of the strip. Note. When there is no confusion, the “band carrier” can be abbreviated as “carrier tape”. 2.3 Chain gear hole sprockethole The carrier carries a row of side holes on each side, through which the device transports the carrier tape, or for coarse adjustment of the carrier tape position. 2.4 Lead pattern leadpattern After etching, the carrier tape has conductive material patterns including inner and outer leads and test pads. 2.5 Inner lead innerlead The innermost conductor of the lead pattern connected to the chip. 2.6 Device window Located in the center of the carrier unit, the chip and inner leads are placed in the holes. 2.7 Outer lead or cut window outerleadorexcisewindow Each side of the carrier unit is suspended from a rectangular hole above the conductor pattern. These holes will form a continuous opening around each unit of the carrier tape. mouth. The bonded circuit is typically cut away from the carrier tape in the opening. 2.8 Support ring An insulating film that supports the conductor pattern between the device window and the outer lead window. 2.9 Body size bodysize The outer dimensions of the support ring. 2.10 Outer lead outerlead The outermost end of the lead pattern conductor connected to the next stage assembly after the soldered integrated circuit is cut and separated from the carrier tape. 2.11 Alignment hole alignmentholes Auxiliary holes on the polymer film for carrier tape positioning during inner lead soldering, electrical testing and aging, cutting, and outer lead soldering. 2.12 Test pad testpads A portion of the conductor pattern used to make electrical connections during live charging tests and aging tests. 3 Description of automatic tape welding (TAB) Carrier tape automatic soldering is an integrated circuit assembly process for bare chips without conventional packages. The basic principle is to put each silicon core The sheet is glued to a special flexible carrier tape. The carrier tape is composed of a thin plastic substrate on which a metal conductor is formed, like a flexible printed circuit. At the inner end of the conductor, the lead pattern has a pattern that matches the solder joint of the chip. At the outermost end of the conductor, due to electrical testing of each conductor and The solder joint has temporary contact. Between the chip connection solder joint and the test pad distribution, there is a long conductor without the support of the insulating film, which will eventually form. The outer leads of the TAB package. The carrier tape, like film, has a row on each side of the carrier tape that is used in the assembly process to make it easy to transport. Gear hole. There are usually three main steps in the use of TAB carrier tape. a) Inner lead soldering - soldering the integrated circuit chip to the lead terminals of the conductor on the carrier tape. The surface of the integrated circuit after soldering will be coated The upper organic protective layer, or the entire integrated circuit, will be encapsulated. b) Electrical test---The inner lead soldered chip can be electrically tested by the test pad provided by the carrier tape. Similar, integrated power The road can be subjected to high temperature pretreatment or aging test. c) External lead soldering - the integrated circuit is cut from the carrier tape and transferred to its final interconnect medium (printed circuit board or On other substrates). The unsupported conductor remains after cutting, forming the outer leads of the TAB package. Outer leads and final The substrate is soldered. Manufacturers of TAB packages typically perform all of the functions required by steps a) and b). The user usually does what is required in step c) Has a function. This section specifies the product format resulting from steps a) and b).

4 size requirements

This section specifies TAB variable parameters. film size, body size, test pad pitch, and outer lead pitch. Based on these four parameters will The TAB size is composed of 4 groups, and each group has corresponding common conditions. All the size requirements in this section are shown in Table 1 to Table 4. Also includes four A table of each possible maximum number of leads for a combination of parameters (see Table 5). 4.1 Membrane specifications The film size is determined by the carrier tape width and the size of the sprocket holes. D6 is defined as the carrier tape width. The carrier tape widths specified in this section are. 35mm, 48mm and 70mm. The outer edge of the carrier tape cannot be made The reference for the reference size. The individual carrier unit length dimensions cut from the carrier tape are defined as E6. The sprocket hole size is defined as G. Only this size relates to the "ultra-large" and "wide-body" types specified in this section. Whether it is very large or Wide body type, sprocket holes can meet the carrier tape form of 48mm and 70mm width, but the 35mm width carrier tape form is only oversized The chain gear hole can be satisfied. The dimensions associated with the membrane specifications are shown in Table 1. 4.2 Registration hole The alignment hole allows two options. the film alignment hole and the metal alignment hole. The film alignment hole can be formed by etching or punching the support film. The metal alignment holes are formed by etching a metal layer. The use of a film alignment hole requires a high positional accuracy of the metallized pattern during the carrier tape manufacturing process, The finished carrier tape meets the geometric tolerance requirements. The use of metal registration holes reduces the accuracy of the positional accuracy of the pattern because the metallized graphics themselves The accuracy determines the positional relationship between the alignment holes and other metal patterns. Therefore, it is recommended to have a small TAB on the outer lead or test pad pitch. A metal alignment hole is used in the carrier tape. However, the metal alignment holes are more likely to be damaged, and they are only used for electrical testing and aging when they are stored in the package. The most accurate alignment operation. Since the metal ring needs to occupy a certain area, when using the metal alignment hole, the maximum number of test pads is reduced. It is very necessary. The registration hole is used as a feature to define the reference line XY and the reference line Z. This is used as a reference for positional tolerances. The registration hole size is defined as F, and the position distribution is determined by the size of D5 and E5. The dimensional values associated with the alignment holes are shown in Table 1. 4.3 Body size The size of the carrier tape body is determined by D1 and E1. The specific carrier tape sizes that may or may be allowed for each film specification are as follows. Membrane size. body size 35mm. 14mm × 14mm, 16mm × 16mm, 18mm × 18mm, 20mm × 20mm; 48mm. 16mm × 16mm, 20mm × 20mm, 24mm × 24mm, 26mm × 26mm, 28mm × 28mm; 70mm. 24mm × 24mm, 28mm × 28mm, 32mm × 32mm, 36mm × 36mm, 40mm × 40mm. The dimensions and tolerances associated with the package body are shown in Table 2. 4.4 Test Land Pattern All test pads are distributed around the carrier unit in a staggered arrangement of two rows. Test the length and width of the pad using B1 and B2 indicates. The pitch of the array test pads is indicated by e1, but the pitch of the same row of test pads in the two rows of test pads is twice that of e1. Measurement The position at which the test pads are arranged on the carrier tape is determined by D3, D4, E3, and E4. The pitch between the inner and outer rows of test pads of different carrier tapes is a fixed value. The spacing between the two rows of test pads of different carrier tape specifications is a fixed value. The number of test pads on the carrier tape is determined by the four-sided test pad pitch of 0.50mm, 0.40mm, 0.30mm, 0.25mm. M1, M2, M3 and M4 are given. The maximum number of test pads depends on the test pad pitch on each side of the carrier unit and the space allowed by the alignment holes. Size between. The minimum distance from the edge of the test pad to the center of the alignment hole is 1.20 mm for the film alignment hole and 1.40 mm for the metal alignment hole. Only when When the number of test pads arranged on the outermost side of each side is an odd number, the outer row of the four sides of the carrier tape has a central test pad electrically connected, and the center pad should be Recognized in a special shape. The dimensions associated with the test pad pattern are shown in Tables 1 and 3. 4.5 outer lead pattern The outer lead conductor has a pitch of e and a width of b. The length of the outer lead conductor and the outer lead window are opened before the outer lead is cut and the outer lead is soldered. The space is represented by D and E respectively. 20mm × 20mm in 35mm film specifications for all carrier tape specifications and body size combinations 28mm × 28mm body in the body and 48mm film specifications requires an odd number of leads per side, and all other carriers are required. The number of side leads is even. The maximum number of leads on each side of the tape package is determined by lead pitch, body size, number of test pads, external leads and measurements The wiring between the test pads is determined. All outer leads are connected to the test pads. The dimensions associated with the outer lead pattern are shown in Table 4. 4.6 Maximum number of leads The number of leads in Table 5 is determined by the wiring relationship between the outer leads and the test pads. These wirings follow the minimum width of the wire and two wires Design rules with a spacing of 60μm. The design rules reflect the manufacturing status of the TAB carrier technology. Outer lead to test pad Line difficulty has proven to be the most important factor limiting the maximum number of leads, not the number of test pads or the outer lead pitch. Some wiring research It also shows that non-wiring changes cause a different number of combinations of variations in the number of leads and the same number of leads. So the code in Table 5 is just The encoding of a subset of all possible combinations of variables. Variable encoding follows the following four rules. ---Wiring meets the 60μm design rule; ---The larger the body, the larger the number of leads; --- The smaller the test pad pitch, the larger the number of leads; --- The smaller the outer lead pitch, the larger the number of leads. Some variable number numbers for the same number of leads will vary depending on the film size, outer lead pitch, and test pad pitch. Appendix A, The coding combinations in Appendix B are the recommended generic combinations.

5 variable combination coding

Variables are numbered in UY-ZW format, U for membrane size, Y for body size, Z for test pad pitch, and W for external reference Line pitch. The permissible values for each variable are specified as follows. U=A, B or C corresponds to 35mm, 48mm or 70mm super large film, respectively, D or E corresponds to 48mm, 70mm width Body type film. Y=A, B, C, D, E, F, G, H, J or K correspond to 14mm × 14mm, 16mm × 16mm, 18mm × 18mm, 20mm × 20mm, 24mm × 24mm, 26mm × 26mm, 28mm × 28mm, 32mm × 32mm, Square body size of 36 mm x 36 mm, 40 mm x 40 mm. Note. The letter I is not used. Z = 1, 2, 3 or 4 corresponds to a test pad pitch of 0.50 mm, 0.40 mm, 0.30 mm or 0.25 mm, respectively. W=1, 2, 3, 4, 5 or 6 corresponds to 0.50 mm, 0.40 mm, 0.30 mm, 0.25 mm, 0.20 mm or 0.15 mm, respectively. Outer lead pitch. The combination of lead numbers in Table 5 specifies all 576 combinations of variables consisting of 4 major design parameters. Each variable combination consists of 4 identifiable parameter codes. Such as AA-22. the first A represents a super large membrane of 35mm width, and the second A represents 14mm × 14mm body size, the first 2 represents 0.40mm test pad pitch, the second 2 represents 0.40mm external reference Line pitch. Similarly, the code CE-25 indicates. a very large film with a width of 70 mm, a body size of 24 mm × 24 mm, 0.40 mm Test pad pitch, outer lead pitch of 0.20 mm. Table 5 lists all allowed membrane sizes and body size combinations, see 4.3. 6 Internal lead welding, external lead welding requirements (ILB and OLB) The structure and size of the inner lead pattern cannot be specified in a specific way because the size of the integrated circuit on the chip and the land pattern are Non-standardized. Similarly, the shape and size of the outer leads after cutting separation and lead forming cannot be standardized because of the outer lead soldering process and the outer leads. The molding process varies depending on the application. a The form of these features is optional and may include the complete encapsulation or application of IC and other structures only on the top surface of the IC. b When the viewing angle is one side of the metal conductor of the......
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