GB/T 44334-2024 English PDF

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GB/T 44334-2024: Silicon epitaxial wafers with buried layers
Status: Valid

Standard ID	USD	BUY PDF	Lead-Days	Standard Title (Description)	Status
GB/T 44334-2024	319	Add to Cart	4 days	Silicon epitaxial wafers with buried layers	Valid

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Basic data

Standard ID: GB/T 44334-2024 (GB/T44334-2024)
Description (Translated English): Silicon epitaxial wafers with buried layers
Sector / Industry: National Standard (Recommended)
Classification of Chinese Standard: H82
Classification of International Standard: 29.045
Word Count Estimation: 16,195
Date of Issue: 2024-08-23
Date of Implementation: 2024-08-23
Issuing agency(ies): State Administration for Market Regulation, China National Standardization Administration

GB/T 44334-2024: Silicon epitaxial wafers with buried layers

---This is a DRAFT version for illustration, not a final translation. Full copy of true-PDF in English version (including equations, symbols, images, flow-chart, tables, and figures etc.) will be manually/carefully translated upon your order.
Silicon epitaxial wafers with buried layers Buried silicon epitaxial wafer ICS 29.045 CCS H 82 National Standard of the People's Republic of China Released on 2024-08-23 2025-03-01 Implementation State Administration for Market Regulation The National Standardization Administration issued

Table of Contents

Preface ... Ⅲ 1 Scope ... 1 2 Normative references ... 1 3 Terms and Definitions ... 1 4 Product categories ... 2 5 Technical requirements ... 2 5.1 Substrate Materials 2 5.2 Epitaxial layer ... 2 5.3 Geometric parameters 4 5.4 Surface Metal ... 4 5.5 Surface quality ... 4 5.6 Edge ... 5 5.7 Others ... 5 6 Test methods ... 5 7 Inspection Rules ... 6 7.1 Inspection and Acceptance 6 7.2 Batch 6 7.3 Inspection Items ... 6 7.4 Sampling 6 7.5 Determination of test results 6 8 Marking, packaging, transportation, storage and accompanying documents 7 8.1 Marking and packaging 7 8.2 Transportation and storage 8 8.3 Accompanying Files ... 8 9 Order Contents ... 8

Foreword

This document is in accordance with the provisions of GB/T 1.1-2020 "Guidelines for standardization work Part 1.Structure and drafting rules for standardization documents" Drafting is required. Please note that some of the contents of this document may involve patents. The issuing organization of this document does not assume the responsibility for identifying patents. This document was prepared by the National Technical Committee on Semiconductor Equipment and Materials Standardization (SAC/TC 203) and the National Technical Committee on Semiconductor Equipment and Materials Standardization (SAC/TC 203). The work was jointly proposed and coordinated by the Materials Subcommittee of the Chemical Technical Committee (SAC/TC 203/SC 2). This document was drafted by. Nanjing Guosheng Electronics Co., Ltd., Xi'an Longwei Semiconductor Co., Ltd., Shanghai Jingmeng Silicon Materials Co., Ltd., Zhejiang Jinruihong Technology Co., Ltd., Zhonghuan Leading Semiconductor Materials Co., Ltd., Zhejiang Lishui Zhongxin Wafer Semiconductor Technology Co., Ltd. Co., Ltd., Nanjing Shengxin Semiconductor Materials Co., Ltd., Nonferrous Metals Technology and Economic Research Institute Co., Ltd., Hebei Puxing Electronic Technology Co., Ltd. Co., Ltd., GENEVA Semiconductor Technology (Shanghai) Co., Ltd., and Saijing Asia Pacific Semiconductor Technology (Zhejiang) Co., Ltd. The main drafters of this document are. Qiu Guangyin, Wang Yinhai, Xie Jin, Luo Hong, He Dongjiang, Ma Linbao, Gu Guangan, Li Shenzhong, Li Chunyang, Xu Xichang, Xu Xinhua, Yuan Futong, Liu Xiaoqing, Mi Jiao, Zhou Yichu, Zhang Qiang. Buried silicon epitaxial wafer

1 Scope

This document specifies the product classification, technical requirements, test methods, inspection rules and marking, packaging, transportation, storage, etc. of buried silicon epitaxial wafers. Storage, accompanying documents and order form contents. This document is applicable to the production, manufacturing, testing, analysis and quality evaluation of silicon epitaxial wafers with buried layer structures. The products are mainly used for the production of integrated Circuit chips and semiconductor discrete devices.

2 Normative references

The contents of the following documents constitute the essential clauses of this document through normative references in this document. For referenced documents without a date, only the version corresponding to that date applies to this document; for referenced documents without a date, the latest version (including all amendments) applies. in this document. GB/T 1550 Test method for conductivity type of extrinsic semiconductor materials GB/T 2828.1-2012 Sampling procedures for inspection by attributes Part 1.Sampling for batch inspection based on acceptance quality limit (AQL) plan GB/T 6617 Silicon wafer resistivity determination - Extended resistance probe method GB/T 6624 Visual inspection method for surface quality of silicon polished wafers GB/T 12964 Silicon single crystal polishing wafer GB/T 13389 Procedure for conversion between resistivity and dopant concentration of boron-doped, phosphorus-doped and arsenic-doped silicon single crystals GB/T 14139 Silicon epitaxial wafer GB/T 14141 Determination of sheet resistance of silicon epitaxial layers, diffusion layers and ion implanted layers - In-line four-probe method GB/T 14142 Test method for crystal integrity of silicon epitaxial layer - Etching method GB/T 14146 Test of carrier concentration in silicon epitaxial layer - Capacitance-voltage method GB/T 14264 Terminology of Semiconductor Materials GB/T 14847 Infrared reflectivity measurement method for thickness of lightly doped silicon epitaxial layer on heavily doped substrate GB/T 19921 Test method for surface particles of silicon polishing wafers GB/T 24578 Total reflection X-ray fluorescence spectrometry test method for metal contamination on silicon wafer surface GB/T 29507 Automatic non-contact scanning method for testing flatness, thickness and total thickness variation of silicon wafers GB/T 32280 Test of silicon wafer warpage and curvature - Automatic non-contact scanning method GB/T 35310.200 mm silicon epitaxial wafer GB/T 39145 Determination of metal element content on silicon wafer surface - Inductively coupled plasma mass spectrometry YS/T 28 Silicon wafer packaging

3 Terms and definitions

The terms and definitions defined in GB/T 14264 and the following apply to this document. 3.1 A wafer obtained by epitaxially growing a semiconductor silicon single crystal thin film layer on a buried layer. ......

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