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GB/T 38659.3-2022 English PDF

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GB/T 38659.3-2022: Electromagnetic compatibility - Risk assessment - Part 3: Risk analysis method for device
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GB/T 38659.3-2022629 Add to Cart 5 days Electromagnetic compatibility - Risk assessment - Part 3: Risk analysis method for device Valid

Similar standards

GB/T 38889   GB/T 38659.1   GB/T 37284   GB/T 18655   GB/T 38659.5   GB/T 38659.4   

Basic data

Standard ID: GB/T 38659.3-2022 (GB/T38659.3-2022)
Description (Translated English): Electromagnetic compatibility - Risk assessment - Part 3: Risk analysis method for device
Sector / Industry: National Standard (Recommended)
Classification of Chinese Standard: L06
Word Count Estimation: 34,315
Issuing agency(ies): State Administration for Market Regulation, China National Standardization Administration

GB/T 38659.3-2022: Electromagnetic compatibility - Risk assessment - Part 3: Risk analysis method for device


---This is a DRAFT version for illustration, not a final translation. Full copy of true-PDF in English version (including equations, symbols, images, flow-chart, tables, and figures etc.) will be manually/carefully translated upon your order.
Electromagnetic compatibility - Risk assessment - Part 3.Risk analysis method for device ICS 33.100 CCSL06 National Standards of People's Republic of China Electromagnetic Compatibility Risk Assessment Part 3.Equipment risk analysis method Released on 2022-10-12 2023-05-01 Implementation State Administration for Market Regulation Released by the National Standardization Management Committee

table of contents

Preface I Introduction II 1 Scope 1 2 Normative references 1 3 Terms, Definitions and Abbreviations 1 4 Overview 5 5 Equipment EMC risk analysis object 5 5.1 Division of Equipment Risk Assessment Units 5 5.2 EMC risk elements 5 6 Mechanical structure EMC risk analysis 6 6.1 Analysis Item 6 6.2 Connector Position (CP) Analysis 7 6.3 Cable shielding (CS) analysis 8 6.4 Port EMC device (I/O-ED) analysis 10 6.5 Board Ground (PG) Analysis 12 6.6 Analysis of ground connection between circuit boards (GCBP) 16 6.7 Interconnect Signal Processing (ISP) Analysis 17 6.8 Metal Part Bond (MPB) Analysis 19 6.9 Board Ground Loop (PGL) Analysis 22 6.10 Equipment Grounding (EG) Analysis 23 7 EMC risk analysis of PCB 25 7.1 PCB risk analysis project 25 7.2 Basis for PCB risk analysis 25 7.3 PCB risk analysis tools 26 7.4 PCB Risk Analysis Procedure 26 7.5 Special Signal Processing (SSP) Analysis 26 8 Verification of digital prototype and sample delivery equipment 29 9 Submission of risk analysis results 29 Reference 30

foreword

This document is in accordance with the provisions of GB/T 1.1-2020 "Guidelines for Standardization Work Part 1.Structure and Drafting Rules for Standardization Documents" drafting. This document is part 3 of GB/T 38659 "Electromagnetic Compatibility Risk Assessment". GB/T 38659 has released the following parts. --- Part 1.Electrical and electronic equipment; --- Part 2.Electrical and electronic systems; --- Part 3.Equipment risk analysis method; --- Part 4.System risk analysis method. Please note that some contents of this document may refer to patents. The issuing agency of this document assumes no responsibility for identifying patents. This document is proposed and managed by the National Radio Interference Standardization Technical Committee (SAC/TC79). This document is drafted by. Shanghai Electrical Apparatus Research Institute, Shanghai Robot Industry Technology Research Institute Co., Ltd., Sichuan Drug Inspection Research Institute Research Institute (Sichuan Provincial Medical Device Testing Center), Schneider Electric (China) Co., Ltd. Shanghai Branch, Nanjing Panda Electronics Co., Ltd. Division, Henan Medical Device Inspection Institute, Xihua University, Nantong Shangyan Robot Technology Co., Ltd., Shanghai Electrical Appliance Science Research Institute (Group) Co., Ltd. Company, Shanghai Tianwei Certification Technology Co., Ltd., Xiamen Product Quality Supervision and Inspection Institute, China Electric Power Research Institute Co., Ltd., Shanghai Power Instrument Equipment Testing Institute Co., Ltd., Bronte Robotics Co., Ltd., Guangdong Liwang High-tech Co., Ltd. The main drafters of this document. Zheng Junqi, Yu Chao, Qiao Feng, Zhang Yifei, Li Yang, Zhang Wei, Cao Lin, Chen Hao, Yuan Shuchuan, Song Jiangwei, Ye Qiongyu, Xie Yanping, Cheng Jianghe, Hu Bei, Zhang Fengxian, Xing Lin, Zhu Yining, Zheng Kaiyu, Guo Jinlong, Sun Chunyang.

Introduction

Electromagnetic compatibility (EMC) risk assessment technology is based on the EMC design method, using general risk assessment methods, according to the risk risk assessment procedures, classify risk levels, and establish ideal models for equipment design (equipment includes electronic and electrical systems and electronic and electrical equipment, electronic and electrical The gas system is composed of multiple electronic and electrical equipment, and the risk assessment of the electronic and electrical system is based on the completed evaluation of the electrical and electronic equipment. Based on the above), determine the risk factors, and then compare the information of the actual design of the equipment with all the risk factors in the ideal model to identify Identify the EMC risk of the equipment, and finally obtain the EMC risk level of the equipment through a specific algorithm through a relatively mature risk assessment technology. EMC risk level is used to indicate the performance of equipment in response to various EMC phenomena, and it is a new model for equipment EMC performance evaluation. GB/T 38659 aims to establish EMC risk assessment methods and analysis methods applicable to electrical and electronic equipment and systems. It is proposed to consist of four parts. --- Part 1.Electrical and electronic equipment. The purpose is to analyze the principles and implementation of the given EMC risk assessment for electrical and electronic equipment method. --- Part 2.Electrical and electronic systems. The purpose is to give analysis principles and implementation of EMC risk assessment for electrical and electronic systems method. --- Part 3.Equipment risk analysis method. The purpose is to provide specific operational methods for the risk analysis of electrical and electronic equipment. laws and procedures. --- Part 4.System risk analysis method. The purpose is to provide specific implementation methods for the risk analysis of electrical and electronic systems. laws and procedures. The mechanical structure design, interconnection cable design, application environment and other elements of the electrical and electronic system will affect the electromagnetic compatibility risk of the electrical and electronic system. Assessment provides guidance. Engineering personnel have an in-depth understanding of EMC risk assessment techniques and correctly use the EMC risk assessment specified in this document method, which will uncover the black box of EMC design of electronic and electrical systems, and can evaluate the EMC performance of the system, and can also be combined with EMC testing The results are combined with a comprehensive EMC evaluation of electrical and electronic systems. Designers or users of electrical and electronic systems, through correct EMC risk assessment, can clearly find that the existing system is The advantages, disadvantages and risks of EMC can be used to predict the pass rate of the EMC test of the system, and it can also predict the system in its life. EMC performance at each stage of the cycle. Electromagnetic Compatibility Risk Assessment Part 3.Equipment risk analysis method

1 Scope

This document gives the risk assessment values for obtaining risk elements in the electromagnetic compatibility (EMC) risk assessment of electrical and electronic equipment, The procedures and methods for risk analysis of risk elements are required, including analysis basis, analysis tool requirements, analysis procedures, etc. This document is applicable to the risk analysis in the EMC risk assessment process of electrical and electronic equipment. This document combines the risk elements of equipment to provide guidance on the risk analysis method in EMC risk assessment.

2 Normative references

The contents of the following documents constitute the essential provisions of this document through normative references in the text. Among them, dated references For documents, only the version corresponding to the date is applicable to this document; for undated reference documents, the latest version (including all amendments) is applicable to this document. GB/T 4365 Electrotechnical Terminology Electromagnetic Compatibility GB/T 23694 Risk Management Terminology GB/T 25000.51 System and software engineering System and software quality requirements and evaluation (SQuaRE) Part 51.Ready to use Quality requirements and testing rules for software products (RUSP) GB/T 31723.406 Test methods for metallic communication cables Part 4-6.EMC surface transfer impedance line injection method GB/T 31723.411 Test methods for metallic communication cables - Part 4-11.EMC jumpers, coaxial cable assemblies, connectors Coupling attenuation or shielding attenuation absorbing clamp method for toner cables GB/T 35033 30MHz~1GHz Electromagnetic shielding material conductivity and metal material lap impedance measurement method GB /Z 37150 EMC Reliability Risk Assessment Guidelines GB/T 38659.1-2020 Electromagnetic Compatibility Risk Assessment Part 1.Electrical and Electronic Equipment IEC 62153-4-4 Test methods for metallic communication cables Part 4-4.Electromagnetic compatibility (EMC) measurement greater than or equal to to up to above 3GHz, triaxial method] IEC 62153-4-5 Test methods for metallic communication cables Part 4-5.Electromagnetic compatibility (EMC) coupling or shielding attenuation absorption 3 Terms, Definitions and Abbreviations 3.1 Terms and Definitions The following terms and definitions defined in GB/T 4365, GB/T 23694, GB /Z 37150 and GB/T 38659.1 apply to this document. 3.1.1 A graph that expresses the connection relationship of a circuit. [Source. GB/T 38659.1-2020, 3.8] 3.1.2 connector position connectorposition; CP The relative position of the cable connectors in the circuit board. 3.1.3 cable shielding cableshielding; CS The shielding effectiveness of the shielded cable or the bonding of the shielding layer. 3.1.4 Port EMC device input/outputEMCdevice;I/O-ED Filtering and protection measures adopted for power and signal input ports outside the PCB, including port EMS devices (3.1.5) and port EMI device (3.1.6). 3.1.5 Port EMS device input/outputEMSdevice; I/O-ESD The power supply and signal input ports outside the PCB require filtering and protection due to electromagnetic interference. 3.1.6 Port EMI device input/outputEMIdevice; I/O-EID Power and signal input ports outside the PCB require filtering due to electromagnetic emissions. 3.1.7 PCBgrounding; PG The interconnection between the "0V" working ground of the PCB board and the metal case (when there is an interconnection). 3.1.8 Interconnection of "0V" working ground between different PCB boards. Note. It is usually realized through structural parts. 3.1.9 The processing of PCB interconnection signals inside the equipment, including EMS processing (3.1.10) and EMI processing of inter-board interconnection signals (3.1.11). 3.1.10 Filtering and protection of PCB interconnection signals inside the equipment. 3.1.11 Frequency processing of PCB interconnection signals inside the device. 3.1.12 Metal parts lap metalplatebonding; MPB The connection mode between the various metal parts in the shell. Note. The contact impedance and gap treatment between metals should be considered when connecting. 3.1.13 PCBgroundingloop; PGL Cables, connectors, circuit boards (possible), circuit board "0V" working ground and the interconnection between the metal shell and the equipment after entering the shell The area of the loop formed between the metal shells. 3.1.14 chassisgrounding;CG The connection between the shell and the ground. 3.1.15 "Dirty" signal processing "dirty" signal processing; DSP Processing of signals/circuits of components or components that are susceptible to external interference injection or electromagnetic emission. Note. Examples of "dirty" signals may include signal lines and components interconnected with I/O cables and before filtering circuits or applied to the surface of the equipment housing. Signal lines for ESD breakdown discharge, etc. 3.1.16 signal or circuit processing of signals or components requiring special processing due to EMC performance, including noise signal processing (3.1.17) and Sensitive signal processing (3.1.18). Note. Special signals are divided into special noise signals/circuits and special sensitive signals/circuits. 3.1.17 Processing of signals or components that are prone to electromagnetic emission disturbances/circuits. Note. Noise signals include clock signal lines, PWM signal lines, crystal oscillators, etc. 3.1.18 Signal/circuit processing of signals or components that are susceptible to electromagnetic interference. Note. Sensitive signals include low-level analog signal lines or components. 3.1.19 "clean" signal processing "clean" signalprocessing; CSP The processing of signals/circuits of components or components that are neither susceptible to interference nor generate electromagnetic emission noise. 3.1.20 Processing between working grounds isolated by isolation devices such as optocouplers and transformers. 3.1.21 Avoid crosstalk between dirty signals and special signals through specific processing methods. 3.1.22 Realize a complete 0V plane by laying copper and other means to reduce the "0V" ground impedance of the PCB, including EMS ground plane integrity (3.1. 23) and EMI ground plane integrity (3.1.24). 3.1.23 Due to electromagnetic interference, it is necessary to achieve a complete 0V plane to reduce the ground impedance by laying copper and other means. 3.1.24 It is necessary to realize a complete 0V plane due to electromagnetic emission by laying copper and other means to reduce the ground impedance. Types 2, 3, 4, and 5 areas (the ground plane is a type), and the parameters are correct. Among them, the second type of signals and circuits that are divided are each type of signal The processing measures on the circuit schematic diagram between the circuit and the circuit are. a) The filter on the "dirty" signal line is generally between the "dirty" signal and the "clean" signal; b) Special signal lines, including filtering on sensitive signals and filtering on special noise signals. Filtering on sensitive signals generally involves Between sensitive signals/circuits and "clean" signals/circuits; filtering on special noise signals, generally between special noise signals/ between a circuit and a "clean" signal/circuit. In addition, the handling of clean lines and the capacitive jumper between different isolated grounds are also part of the realization of the ideal model of the circuit schematic. The realization of the EMC ideal model of PCB layout and wiring is combined with the attribute division of the circuit schematic diagram, and each signal layer needs to be divided according to Figure 7 in GB/T 38659.1-2020 is achieved through the following measures. a) PCB complete ground plane impedance minimization; b) No crosstalk occurs between signal lines of different properties; c) The edges of the signal layer and the power layer are grounded to prevent edge effects (reduce the parasitic electric potential between the signal line and the power line and the reference ground) Allow). 7.3 PCB Risk Analysis Tool PCB risk analysis tools include the following. --- Using a dedicated PCBEMC risk analysis tool; or --- Oscilloscope (the measurement bandwidth is at least 5 times the highest operating frequency of the analyzed PCB board), and use the high-speed measurement as shown in Figure 12 volume probe; or --- Special devices, tools and software for other filtering EMC risk analysis. 7.4 PCB risk analysis procedure The risk analysis of PCB risk elements can be carried out by combining manual visual inspection and measurement, except for risk element K. special signal/ outside the circuit area (this element should be carried out using a combination of visual inspection and measurement), it is also possible to use a suitable PCB risk assessment tool to implement. When using a dedicated PCBEMC risk analysis tool for execution, the risk analysis tool must at least meet the following requirements. ---Be able to divide the attributes of the components and printed lines (including power lines, signal lines, and ground lines) in the circuit schematic diagram, and the attributes can be divided at least There are four categories. "clean", "dirty", special noise, and special sensitivity. The attribute division can be done automatically or manually; --- Can check and confirm the parameters of relevant components, and can determine the processing methods of various types of signal lines according to the provisions of GB/T 38659.1, Such as decoupling, filtering, surge protection, etc.; ---The printed lines can be given different attributes; ---The design of the integrity of the ground plane can be automatically checked according to the provisions of GB/T 38659.1; ---Can automatically check the isolation ground and the design situation between isolation grounds according to the provisions of GB/T 38659.1; --- Conduct crosstalk prevention inspection on signal lines according to GB/T 38659.1 to form risk analysis specified in GB/T 38659.1 in conclusion; ---Software should comply with the provisions of GB/T 25000.51; ---Other additional functions; ---When the "dirty" signal in the PCB has a filter or the filter parameters cannot be known, you can refer to the definition of GB/T 7343 and use the filter EMC For the special device for risk analysis, refer to the method of GB/T 38659.1 for risk analysis to obtain the risk assessment value of the elements. 7.5 Special Signal Processing (SSP) Analysis 7.5.1 Sensitive Signal Processing (SeSP) Analysis 7.5.1.1 Basis for analysis Sensitive signal processing analysis is based on the processing of sensitive signals in the circuit board, using Table 18 to determine the risk assessment of this risk element

8 Checking of digital prototype and sample delivery equipment

The risk analysis of the mechanical structure can be aimed at the physical prototype or the digital prototype, and the risk analysis of the circuit board is mainly aimed at the circuit schematic diagram and PCB layout and routing files, in order to confirm that the analyzed digital prototype, circuit schematic diagram, PCB layout and routing files are consistent with the actual equipment Whether it is consistent or not needs to be checked. The content of the check includes at least the following aspects. ---The main size and shape of the chassis; ---The connection relationship between the circuit board and the chassis and cables; --- EMC key circuits in the circuit board, at least including key component models, filter circuits and component models, clock frequency, PCB layer number and stacking layout, etc.

9 Submission of risk analysis results

The process and results of risk analysis for each evaluation unit shall be recorded. The relevant information being analyzed should be presented in understandable terms reached and recorded in the original record. Analysis results should be recorded in a comprehensive original record, the original record should have enough detail to ensure the correctness of the analysis. Original records should contain at least the following information. ---Objective and scope; ---The relationship between the analyzed object and the risk element assessment value; ---List the key information of the brand, specification, model and elements of the equipment; ---Analytical method description; --- EMC risk analysis process and results; --- Conclusion and recommendations.
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