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GB/T 26069-2022 English PDF

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GB/T 26069-2022: Annealed monocrystalline silicon wafers
Status: Valid

GB/T 26069: Historical versions

Standard IDUSDBUY PDFLead-DaysStandard Title (Description)Status
GB/T 26069-2022179 Add to Cart 3 days Annealed monocrystalline silicon wafers Valid
GB/T 26069-2010439 Add to Cart 3 days Specification for silicon annealed wafers Obsolete

Similar standards

GB/T 12963   GB/T 29055   GB/T 25074   GB/T 26071   GB/T 26072   

Basic data

Standard ID: GB/T 26069-2022 (GB/T26069-2022)
Description (Translated English): Annealed monocrystalline silicon wafers
Sector / Industry: National Standard (Recommended)
Classification of Chinese Standard: H82
Word Count Estimation: 9,978
Issuing agency(ies): State Administration for Market Regulation, China National Standardization Administration

GB/T 26069-2022: Annealed monocrystalline silicon wafers

---This is a DRAFT version for illustration, not a final translation. Full copy of true-PDF in English version (including equations, symbols, images, flow-chart, tables, and figures etc.) will be manually/carefully translated upon your order.
Annealed monocrystalline silicon wafers ICS 29.045 CCSH82 National Standards of People's Republic of China Replacing GB/T 26069-2010 Silicon single crystal annealed wafer Published on 2022-03-09 2022-10-01 Implementation State Administration for Market Regulation Released by the National Standardization Administration

foreword

This document is in accordance with the provisions of GB/T 1.1-2020 "Guidelines for Standardization Work Part 1.Structure and Drafting Rules of Standardization Documents" drafted. This document replaces GB/T 26069-2010 "Specification for Silicon Annealed Sheets". Compared with GB/T 26069-2010, except for structural adjustment and editing In addition to the sexual changes, the main technical changes are as follows. a) In the chapter "Scope", the contents of packaging, marking, transportation, storage, accompanying documents and order forms have been added, and the description of silicon single crystal annealed wafers has been changed. Scope of application (see Chapter 1, Chapter 1 of the.2010 edition); b) Added the terms "annealed sheet" and "technical generation" and their definitions (see Chapter 3); c) Added technical specifications for silicon single crystal annealed wafers required for 65nm, 45nm, 32nm and 22nm integrated circuit line widths (see Section 4 chapter); d) Added the basic requirements for annealed sheets, which should meet the requirements of GB/T 12962, GB/T 29504, GB/T 12965, and GB/T 29508. Seek (see 5.1); e) Changed the requirements for silicon wafer identification, radial oxygen content, thickness and allowable deviation, local light scatterers, etc., deleted diameter, edge surface, etc. Condition, flatness, slip, bulk micro-defect (BMD) etch band depth, etc., add main reference plane or notch crystal orientation, edge wheel Profile, back surface state, clean zone width (DZ) and other requirements (see Chapter 5, 4.2 of the.2010 edition); f) Removed radial resistivity change, crystal orientation, reference plane length, main reference plane orientation, crystal integrity, diameter, interstitial oxygen content, interstitial Measurement method for radial variation of interstitial oxygen content, edge profile (see 5.3, 5.4, 5.5, 5.6, 5.7, 5.9, 5.10 and.2010 edition 5.15) g) The measurement methods of thickness, total thickness variation, and local flatness have been changed (see 6.3, 5.11 and 5.13 of the.2010 edition); h) The measurement method of warpage has been changed (see 6.4, 5.12 of the.2010 edition); i) the method for measuring the gloss of the back surface is added (see 6.6); j) Changed the test method for surface metal content (see 6.8, 5.17 of the.2010 edition); k) Added the test method for bulk metal (iron) content (see 6.10); l) The inspection method for the width of the clean area and the density of micro-defects in the body is added (see 6.11); m) Changed the group batch method (see 7.2, 6.2 of the.2010 edition); n) The conductivity type, geometric parameters, surface metal content and oxidation-induced defects have been added to the full inspection items (see 7.3.1); o) Added the determination of inspection results (see 7.5); p) changed the packaging (see 8.1, 7.2 of the.2010 edition); q) Added accompanying files (see 8.5). Please note that some content of this document may be patented. The issuing agency of this document assumes no responsibility for identifying patents. This document is jointly developed by the National Standardization Technical Committee for Semiconductor Equipment and Materials (SAC/TC203) and the National Standard for Semiconductor Equipment and Materials The material sub-technical committee (SAC/TC203/SC2) of the Chemical Technology Committee jointly proposed and managed it. This document is drafted by. Youyan Semiconductor Silicon Materials Co., Ltd., Shandong Youyan Semiconductor Materials Co., Ltd., Zhejiang Zhongjing Electronics Co., Ltd. Company, Luoyang Hongtai Semiconductor Co., Ltd., Kaihua County Inspection and Testing Research Institute, Zhejiang Zhongjing Technology Co., Ltd., Zhejiang Jinruihong Technology Co., Ltd., Zhejiang Haina Semiconductor Co., Ltd., Zhonghuan Leading Semiconductor Materials Co., Ltd. The main drafters of this document. Sun Yan, Ning Yongduo, Lou Chunlan, Chen Feng, Huang Xiaoxiao, Wang Zhenguo, Zhang Haiying, Pan Jinping, You Bailing. The previous versions of this document and its superseded documents are as follows. ---First published in.2010 as GB/T 26069-2010; ---This is the first revision. Silicon single crystal annealed wafer

1 Scope

This document specifies the classification, technical requirements, test methods, inspection rules, packaging, marking, Transportation, storage, accompanying documents and content of the order form. This document is applicable to silicon wafers with a certain width of clean area formed on the surface of silicon single crystal polished wafers by annealing process. The products are used for technical generation 180nm~22nm integrated circuits.

2 Normative references

The contents of the following documents constitute essential provisions of this document through normative references in the text. Among them, dated citations documents, only the version corresponding to that date applies to this document; for undated references, the latest edition (including all amendments) applies to this document. GB/T 1550 Test method for conductivity type of extrinsic semiconductor materials GB/T 2828.1-2012 Counting Sampling Inspection Procedures Part 1.Lot-by-Lot Inspection Sampling Retrieved by Acceptance Quality Limit (AQL) plan GB/T 4058 Test method for oxidation-induced defects of silicon polished wafers GB/T 6616 Semiconductor silicon wafer resistivity and silicon thin film sheet resistance test method non-contact eddy current method GB/T 6624 Visual inspection method for the surface quality of silicon polished wafers GB/T 12962 Silicon single crystal GB/T 12965 Silicon single crystal cutting and grinding wafers GB/T 14264 Terms of Semiconductor Materials GB/T 19921 Test method for surface particles of silicon polished wafers GB/T 29504 300mm silicon single crystal GB/T 29507 Silicon wafer flatness, thickness and total thickness variation test automatic non-contact scanning method GB/T 29508 300mm silicon single crystal cutting wafer and grinding wafer GB/T 32280 Automatic non-contact scanning method for testing the warpage and curvature of silicon wafers GB/T 39145 Determination of Metal Element Content on the Surface of Silicon Wafer Inductively Coupled Plasma Mass Spectrometry YS/T 28 wafer packaging YS/T 679 Surface Photovoltaic Method for Measuring Minority Carrier Diffusion Length in Extrinsic Semiconductors

3 Terms and Definitions

The terms and definitions defined in GB/T 14264 and the following apply to this document. 3.1 Annealed Wafer Annealedwafer High temperature annealing in a neutral or reducing atmosphere results in no crystal defects in the near-surface clean area of the silicon polished wafer [including crystal primary concave pit (COP)] on the silicon wafer.
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